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In Stock

RoHS

Mfr.	Mfr. No:	Qty	Ext Total

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AS4C2M32S-7BCN

Name: Alliance Memory AS4C2M32S-7BCN
Brand: Alliance Memory
SKU: 913-AS4C2M32S-7BCN
Price: 5.2 USD
Availability: InStock

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Mouser No:

913-AS4C2M32S-7BCN

Mfr. No:

AS4C2M32S-7BCN

Mfr.:

Alliance Memory

Description:

DRAM SDRAM, 64Mb, 2M X 32, 3.3V, 90-ball BGA, 143 MHz, Commercial Temp - Tray

Datasheet:

AS4C2M32S-7BCN Datasheet (PDF)

ECAD Model:

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More Information

Learn more about Alliance Memory AS4C2M32S-7BCN

In Stock: 66

Stock:: 66 Can Dispatch Immediately

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Factory Lead Time:: 20 Weeks Estimated factory production time for quantities greater than shown.

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Unit Price:

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Ext. Price:

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Pricing (USD)

Qty.	Unit Price	Ext. Price
	$5.20	$5.20
	$4.86	$48.60
	$4.71	$117.75
	$4.60	$230.00
	$4.39	$439.00
	$4.18	$794.20
	$4.10	$2,337.00
	$4.01	$4,571.40
	$3.83	$10,187.80

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM
Memory Size:	64 Mbit
Data Bus Width:	32 bit
Maximum Clock Frequency:	143 MHz
Package/Case:	TFBGA-90
Organisation:	2 M x 32
Access Time:	5.4 ns
Supply Voltage - Min:	3 V
Supply Voltage - Max:	3.6 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 70 C
Series:	AS4C2M32S
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	TW
Country of Diffusion:	TW
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	190
Subcategory:	Memory & Data Storage
Supply Current - Max:	75 mA
Unit Weight:	1.849 g

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Datasheet

AS4C2M32S-7BCN Datasheet (PDF)

REACH Declaration (PDF)

CNHTS:: 8542329000
USHTS:: 8542320002
JPHTS:: 854232021
KRHTS:: 8542321010
MXHTS:: 8542320201
ECCN:: EAR99

AS4C SDRAM

Alliance Memory AS4C SDRAM is high-speed CMOS synchronous DRAM containing 64Mbits, 128Mbits, or 256Mbits. They are internally configured as 4 banks of 1M, 2M, or 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented, accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command.