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In Stock

RoHS

Mfr.	Mfr. No:	Qty	Ext Total

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AS4C4M16SA-6BAN

Name: Alliance Memory AS4C4M16SA-6BAN
Brand: Alliance Memory
SKU: 913-4C4M16SA-6BAN
Price: 6.66 USD
Availability: InStock

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Mouser No:

913-4C4M16SA-6BAN

Mfr. No:

AS4C4M16SA-6BAN

Mfr.:

Alliance Memory

Description:

DRAM SDRAM, 64Mb, 4M x 16, 3.3V, 54ball BGA, 166 Mhz, Automotive temp - Tray

Datasheet:

AS4C4M16SA-6BAN Datasheet (PDF)

ECAD Model:

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More Information

Learn more about Alliance Memory AS4C4M16SA-6BAN

In Stock: 1,054

Stock:: 1,054 Can Dispatch Immediately

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Factory Lead Time:: 12 Weeks Estimated factory production time for quantities greater than shown.

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Unit Price:

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Ext. Price:

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Est. Tariff:

Pricing (USD)

Qty.	Unit Price	Ext. Price
	$6.66	$6.66
	$6.19	$61.90
	$6.00	$150.00
	$5.87	$293.50
	$5.72	$572.00
	$5.54	$1,385.00
	$5.40	$1,879.20
	$5.27	$5,501.88
2,784	Quote

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM
Memory Size:	64 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	166 MHz
Package/Case:	TFBGA-54
Organisation:	4 M x 16
Access Time:	5.4 ns
Supply Voltage - Min:	3 V
Supply Voltage - Max:	3.6 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 105 C
Series:	AS4C4M16SA
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	TW
Country of Diffusion:	TW
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	348
Subcategory:	Memory & Data Storage
Supply Current - Max:	50 mA
Unit Weight:	1.197 g

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Datasheet

AS4C4M16SA-6BAN Datasheet (PDF)

REACH Declaration (PDF)

CAHTS:: 8542320020
USHTS:: 8542320002
JPHTS:: 854232021
MXHTS:: 8542320299
ECCN:: EAR99

AS4C SDRAM

Alliance Memory AS4C SDRAM is high-speed CMOS synchronous DRAM containing 64Mbits, 128Mbits, or 256Mbits. They are internally configured as 4 banks of 1M, 2M, or 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented, accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command.