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SN74HC112D

Name: Texas Instruments SN74HC112D
Brand: Texas Instruments
SKU: 595-SN74HC112D
Price: 1.57 USD
Availability: InStock

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See Product Specifications

Mouser No:

595-SN74HC112D

Mfr. No:

SN74HC112D

Mfr.:

Texas Instruments

Description:

Flip-Flops Dual

Lifecycle:

End of Life:

Scheduled for obsolescence and will be discontinued by the manufacturer.

Datasheet:

SN74HC112D Datasheet

ECAD Model:

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In Stock: 2,889

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Unit Price:

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Ext. Price:

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Pricing (USD)

Qty.	Unit Price	Ext. Price
	$1.57	$1.57
	$1.00	$10.00
	$0.892	$22.30
	$0.733	$87.96
	$0.64	$179.20
	$0.607	$315.64
	$0.509	$509.00
	$0.466	$1,174.32
	$0.437	$2,185.00

Alternative Packaging

Mfr. Part No.:

SN74HC112DR

Packaging:

Reel, Cut Tape, MouseReel

Availability:

In Stock

Price:

$0.60

Min:

Similar Product

Mfr.:

Texas Instruments

Mfr. No:

SN74HC112DR

Description:

Flip-Flops Dual Neg-Edge-Trig J -K Flip-Flop A 595- A 595-SN74HC112D

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Flip-Flops
RoHS:
Logic Type:	J-K Type Flip-Flop
Logic Family:	HC
Number of Circuits:	2 Circuit
Output Type:	CMOS
Package/Case:	SOIC-Narrow-16
Input Type:	CMOS, LVTTL
Polarity:	Inverting/Non-Inverting
Propagation Delay Time:	125 ns
High Level Output Current:	- 4 mA
Low Level Output Current:	4 mA
Supply Voltage - Min:	2 V
Supply Voltage - Max:	6 V
Mounting Style:	SMD/SMT
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 85 C
Packaging:	Tube
Brand:	Texas Instruments
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	MX
Number of Input Lines:	2
Number of Output Lines:	3 Line
Product Type:	Flip Flops
Series:	SN74HC112
Factory Pack Quantity:	40
Subcategory:	Logic ICs
Unit Weight:	141.700 mg

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Logic Guide (Rev. AB)

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CNHTS:: 8542399000
CAHTS:: 8542390000
USHTS:: 8542390090
JPHTS:: 8542390990
TARIC:: 8542319000
MXHTS:: 8542310399
ECCN:: EAR99

SN74HC112 Dual J-K Flip-Flops

Texas Instruments SN74HC112 Dual J-K Flip-Flops contain two independent J-K negative-edge-triggered flip-flops. A low level at the clear (/CLR) inputs or preset (/PRE) resets or sets the outputs, no matter the levels of the other inputs. The data at the J and K inputs that meet the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse when /CLR and /PRE are inactive (high). Clock triggering is not directly related to the fall time of the CLK pulse and occurs at a voltage level. The J and K input data may be changed without affecting the levels at the outputs following the hold-time interval. The Texas Instruments SN74HC112 are versatile flip-flops that perform as toggle flip-flops by tying J and K high.